Serial Wombat
a general-purpose digital interface
device for hobbyists, engineers and students
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Serial Wombat SPI Master Channel Mode
The SPI Master Channel Mode allows the user to attach slave SPI devices to the Serial Wombat. The pin to which this mode is assigned becomes the chip select line for the device. The Serial Wombat's hardware-enhanced SPI pins ( 18, 23, and 24 ) are used for the SCL, SDI and SDO lines of the SPI bus. Polarity, clock rate, and sampling point are configurable, within the limitations of the hardware capabilities of the 18F4620 microcontroller upon which the Serial Wombat is based. The pin configured as the chip select may not be the SCL, SDI, or SDO pin, but can be a non-I/O pin such as power or chip reset, if no chip select is required.
The SPI Master Channel Mode uses Queues for the output / input which goes to / from the SPI bus. The steps for using this mode are as follows:
- Create two queues (SPI Transmit and Receive) in the User RAM area. The size of the queues depend ons how many bytes of data need to be moved in the largest single SPI transaction.
- Configure the Pin mode with the polarity, clock rate, etc for the SPI format being used, and the addresses of the queues created in the previous step.
- Load data to be sent into the Transmit queue created in step 1.
- Send the trigger Pin Mode configuration command. This will cause the Chip Select to be asserted, and all data in the Transmit Queue to be sent out the SDO pin. Data which is received on the SDI pin will be placed in the Receive queue. Then the Chip Select will be deasserted. Note that the Pin Mode will block until the transaction is complete, and other pins will not be serviced during this time.
- If desired, read the received data out of the Receive queue.
Message format:
The SPI Master Channel Mode uses three channel mode configuration commands. The first two are for initial configuration of the mode. The third lets the Wombat know that the Transmit queue is loaded and ready to go, triggering the SPI transaction.
| Data Sent to the Wombat: | 200 | Pin # | 26 | Bit Sample Position | Clock output select | Clock Polarity | Chip Select Polarity | 0x55 |
| Meaning: | Configure Pin First message | Pin Number to be set to SPI Master Mode (chip select pin). | SPI Master Pin Mode | 1 = Input data sampled at end
of data output time 0 = Input data sampled at middle of data output time |
1 = Transmit occurs on
transition from active to Idle clock state 0 = Transmit occurs on transition from Idle to active clock state |
1 = Idle state for clock is a
high level 0 = Idle state for clock is a low level |
0: Chip select is active low 1: Chip select is active high |
Unused |
| This message is echoed back by the Wombat. | ||||||||
The second message provides additional configuration information, and should be sent after the 200 message:
| Data Sent to the Wombat: | 201 | Pin # | 26 | SPI Clock | Transmit Queue Address High Byte | Transmit Queue Address Low Byte | Receive Queue Address High Byte | Receive Queue Address Low Byte |
| Meaning: | Configure Pin Second message | Pin Number to be set to SPI Master Mode (chip select pin). | SPI Master Pin Mode | 0: Crystal Frequency (8Mhz if
using internal) 1: Crystal freq / 4 (2 Mhz) 2: Crystal freq / 16 (500 kHz) 3: TMR2 output / 2 (see 18F4620 documentation) 4 or higher: Software (slow) clock. Bigger numbers slow the clock. |
Address in user ram of the queue holding data to be transmitted. | Address in user
ram of queue to put receive data in as it is received. (0xFFFF if none). |
||
| This message is echoed back by the Wombat. | ||||||||
The third message is used to trigger a SPI transaction. This is used each time a new set of data is loaded into the Transmit queue for transmission.
| Data Sent to the Wombat: | 202 | Pin # | 26 | 0x55 | 0x55 | 0x55 | 0x55 | 0x55 |
| Meaning: | Configure Pin Third message | Pin Number to be set to SPI Master Mode (chip select pin). | SPI Master Pin Mode | Unused | Unused | Unused | Unused | Unused |
| This message is echoed back by the Wombat. | ||||||||
Example 1: Using a SPI based Digital to Analog converter.
The Microchip MCP4821 is a SPI based 12-bit Digital to Analog converter. Reading through the datasheet, we can determine the following about this part:
- It can use a clock frequency up to 20MHz
- Idle Polarity is Low
- Chip Select active is Low
- Data is clocked in on transition from Active to Idle
- The chip doesn't output spi data, so the sample point doesn't matter
- The output is configured using a single 16 bit transaction. To get an output, the desired value (0 to 4095) is logical OR'ed with 0x1000.
Assume we've connected the CS line to Wombat pin 20.
Commands:
128 0x0000 0x0002 0 ; Create a 2 byte queue at address 0x0000
200 20 26 0 1 0 0 0x55 ; Configure Pin 20 to be SPI master chip select
; Sampling point doesn't matter
; Transmit on active to idle
; Idle is Low
; Chip select is active low
201 20 26 0 0x0000 0xFFFF 0x55 0x55 ; Configure Pin 20 to be SPI master chip select
; Clock at 8Mhz (fastest we can go)
; Transmit buffer is at 0x0000
; No Receive buffer
131 0x0000 2 0x1800 0x55 0x55 ; Place two bytes in queue at address 0x0000: 0x18 and 0x00
; (Will cause D/A to go to 50%, or 2.048V)
202 20 26 0x55 0x55 0x55 0x55 0x55 ; Cause Queue to be sent out over SPI
131 0x0000 2 0x1C00 0x55 0x55 ; Place two bytes in queue at address 0x0000: 0x1C and 0x00
; (Will cause D/A to go to 75%)
202 20 26 0x55 0x55 0x55 0x55 0x55 ; Cause Queue to be sent out over SPI
131 0x0000 2 0x1o00 0x55 0x55 ; Place two bytes in queue at address 0x0000: 0x10 and 0x00
; (Will cause D/A to go to 0%)
202 20 26 0x55 0x55 0x55 0x55 0x55 ; Cause Queue to be sent out over SPI